Integrated circuit (IC) components are easily damaged by excess voltage. One common source of excess voltage is electrostatic voltage or ESD. A pin of the IC may come into contact with a charged human body. For example, the pin may come into contact with the charged human body when the IC is removed from a plastic package or in other circumstances such as during servicing. Damaging ESD may be input to the pin of the IC from the human body. This is generally called the human body model.
Another source of ESD is from metallic objects. Metallic objects have a greater capacitance and lower source resistance than the human body ESD source. Metallic object ESD sources may cause ESD transients with significantly higher rise times than the human body ESD source. This is generally called the machine model.
A third ESD source occurs when the IC becomes charged and discharges to ground. An ESD discharge current flows in an opposite direction in the IC as compared with human body and metallic object ESD sources. These pulses have very fast rise times as compared with the human body ESD sources. This is generally known as the charge device model.
If these high electrostatic voltages are applied to the pins of the IC, the discharge may damage the IC. The electrostatic voltages may destroy a component or may reduce the operating life of the component and/or the IC. The problems caused by ESD are even more pronounced when using advanced processes such as CMOS, which has a much smaller physical geometry.
ESD protection circuits, which form part of the IC, are normally added between the input pads of the IC and blocking capacitors. ESD protection circuits may also be used at the outputs of the IC. The ESD protection circuits begin conducting or undergo breakdown to provide an electrical path to ground (or to a power-supply rail) when excess voltage occurs.
Conventional ESD protection circuits usually have a large capacitance that sometimes degrades the performance of components within the IC. For example, the large capacitance of the ESD protection circuits at the input of a wireless transceiver typically degrades the design performance of the wireless transceiver. An ESD protection transistor that is used in conventional ESD protection circuits has an enlarged drain area. Typically the drain extension is at least 2-3 times the minimum drain width that is permitted by the foundry process that is used. Drain extensions that are 10-15 times the minimum drain width have also been used.
The increased drain area substantially increases the capacitance CESD of the ESD protection circuit. Typical values for CESD using this approach are 1.5 pF for a 3 kV rating. The increased capacitance CESD also increases the noise that is contributed by the ESD protection circuit. As CESD increases, coupling of the noise from the ESD circuit to the transceiver increases, which adversely impacts the operation of the transceiver. For example, the increased noise is amplified by the low noise amplifier in wireless transceivers.